A driver circuit is a key component in a liquid-crystal display (LCD). Conventionally, the driver circuit was fabricated in the form of integrated circuit (IC) to drive an LCD panel. Further, to reduce the fabrication cost and improve the device performance, an amorphous-silicon integrated gate driver, hereafter “ASG”, has been developed, in which the gate driver is integrated into the LCD panel in the array process of the amorphous-silicon-based display manufacturing. This scheme is also referred to as the gate driver on array (GOA) or the gate driver on panel (GOP).
FIG. 1 schematically shows a circuit diagram of a prior-art GOA, and FIG. 2 shows an output gate signal Gate1 in FIG. 1, in comparison with its input clock signal CK1. The GOA circuit may include a starting input terminal STV, three clock input terminals CLK1/CLK3/CLK5, a control unit with two output terminals P and Z, thin-film transistors (TFTs) M1-M5, a low-level voltage VGL, an output terminal Gate1 for the scanning signal, and a capacitor Cb. Generally, the TFT M1, the key component of the output stage, has large capacitances Cgd (between its gate and drain) and Cgs (between its gate and source) due to its large size. This renders the coupling between the clock signal at the clock input terminal CLK1 and the parasitic capacitor in the TFT M1 when the clock signal rises up or falls down, so that ripples may appear in the scanning signal at the output terminal Gate1. The ripples, including positive ones (going up) and negative ones (going down), may influence the pixel voltage of the LCD.
FIG. 3 schematically shows a circuit diagram of a GOA-based display panel, in which the effects of the positive ripples on the gate driver circuit is also shown. The output terminal Gate1 is electrically connected to the gate of the pixel TFT in the pixel unit through the scan line. The scanning signal at the output terminal Gate1 is used to control the pixel TFT to be in the ON or OFF state.
In the period indicated as Tn in FIG. 3, the data in the data signal Vdata may be written into the pixel unit. When the pixel TFT is turned on, the pixel voltage Vpixel may rise up to the voltage Vd and then fall down to the voltage Vp in the period Tn. The pixel TFT in the pixel unit is controlled by the scanning signal at the output terminal Gate1 of the gate driver circuit, which is electrically connected to the gate of the pixel TFT. Ideally, if the scanning signal is in a LOW-level voltage, the pixel TFT in the pixel unit will be turned off. However, the pixel TFT may not stay in the OFF state completely due to a leakage current Ioff flowing from Vpixel to Vdata, because the ripple voltage may still bias the gate of the pixel TFT. Wherein, the ripple voltage comes from the rippled clock signals in the output stage (or the TFT M1) of the GOA, which is electrically coupled to the scan line. Consequently, the GOA may generate a ripple in each of the scan lines in every period Tn.
The positive ripples may affect an image contrast on the display panel. A positive ripple with a large peak voltage may cause a leakage current flowing in the pixel TFT to lower the pixel voltage Vpixel, rendering insufficient darkness for a black image. The contrast ratio of a display system can be defined as the ratio of the luminance of a white image (the brightest color) to that of a black image (the darkest color) therein, so the positive ripple may further downgrade the contrast ratio of the display.
FIG. 4 schematically shows an output signal of a GOA in a prior-art 3.5-inch QVGA (Quarter video graphics array) display by simulation. FIG. 5 shows current-voltage characteristic curves of the QVGA display for various testing time. FIG. 6 shows a measured output signal of the QVGA display of FIG. 4. If a pull-down TFT (such as the TFT M3 in FIG. 1) is biased by a clock signal at a high temperature (e.g., 80° C.), its threshold voltage Vth will shift, as shown in FIG. 5. This may produce a downgrade of the pull-down capacity of the TFT and pulses in its output voltage as shown in FIGS. 4 and 6, further causing a flashing phenomenon on the display image.
Therefore, it is in need to develop a new gate driver circuit and a display apparatus using the gate driver circuit, to alleviate the above-described problems.